The disclosure relates to a cross-point memory device including multi-level cells, and more particularly, to a cross-point memory device including multi-level cells and an operating method thereof.
According to demands for high capacity and low power of memory devices, next generation memory devices that are nonvolatile and do not need to be refreshed have been studied. Such a next generation memory device may have a high integration of a dynamic random access memory (DRAM), a nonvolatile characteristic of a flash memory, a high speed of a static RAM (SRAM), etc. A phase change RAM (PRAM), a nano floating gate memory (NFGM), a polymer RAM (PoRAM), a magnetic RAM (MRAM), a ferroelectric RAM (FeRAM), a resistive RAM (RRAM), etc. are mentioned as next generation memory devices.